Title of article :
Address Generators for Mapping Arrays in Bit-Reversed Order.
Author/Authors :
T. R. Harley and G. P. Maheshwaramurthy، نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2004
Pages :
11
From page :
1693
To page :
1703
Abstract :
A new technique enables fast Fourier transform (FFT) software to more efficiently use memory and processing time. The technique is used to design address pair generators for mapping an array in bit-reversed order. For exemplary digital signal processing (DSP) processors, in-place bit-reversed mappings based on the new technique were found to often have better computational efficiency than an out-of-place mapping.
Keywords :
discrete Fourier transform , Computation time , software requirements and specifications.
Journal title :
IEEE TRANSACTIONS ON SIGNAL PROCESSING
Serial Year :
2004
Journal title :
IEEE TRANSACTIONS ON SIGNAL PROCESSING
Record number :
403591
Link To Document :
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