Title of article
Power-/Energy Efficient BIST Schemes for Processor Data Paths
Author/Authors
Nektarios Kranitis ، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2000
Pages
14
From page
15
To page
28
Abstract
Processor core power is primarily consumed in a data path consisting of high-activity functional modules. We propose low-power/energy BIST schemes for data path architectures built around the most common combinations of multipliers, adders, ALUs, and shifters
Journal title
IEEE Design and Test of Computers
Serial Year
2000
Journal title
IEEE Design and Test of Computers
Record number
431305
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