ITC Highlights Gordon W. Roberts, McGill University Robert C. Aitken, Artisan Components pp. 55-57 Embedded Deterministic Test for Low-Cost Manufacturing Janusz Rajski, Mentor Graphics Mark Kassab, Mentor Graphics Nilanjan Mukherjee, Mentor Graph

You have probably heard that BIST takes too long and its fault coverage is low, and that deterministic test requires too many patterns. This article shows how on-chip compression and decompression techniques provide high fault coverage with low test times.