Title of article :
A Top-Down Methodology for Microprocessor Validation
Author/Authors :
Prabhat Mishra، نويسنده , , University of California، نويسنده , , Irvine Nikil Dutt، نويسنده , , University of California، نويسنده , , Irvine Narayanan Krishnamurthy، نويسنده , , Motorola Magdy S. Abadir، نويسنده , , Motorola ، نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2004
Pages :
10
From page :
122
To page :
131
Abstract :
A major challenge in todayʹs functional verification is the lack of a formal specification with which to compare the RTL model. We propose a novel top-down verification approach that allows specification of a design above the RTL. From this specification, it is possible to automatically generate assertion models and RTL reference models. We also demonstrate that symbolic simulation and equivalence checking can be applied to verify an RTL design against its specification.
Journal title :
IEEE Design and Test of Computers
Serial Year :
2004
Journal title :
IEEE Design and Test of Computers
Record number :
431481
Link To Document :
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