• Title of article

    Standards: DASC sees moves toward formality in design

  • Author/Authors

    Cadence Victor Berman، نويسنده , , Cadence Design Systems، نويسنده ,

  • Issue Information
    روزنامه با شماره پیاپی سال 2006
  • Pages
    2
  • From page
    428
  • To page
    429
  • Abstract
    We discussed two interesting standardization proposals: Rosetta and Esterel version 7. Both are based on technology that has been under development for a long time, and both target the formalization of system-level design and verification. System-level design involves consolidating information from multiple domains to predict the effects of design decisions. To support system-level design, a language must allow heterogeneous specification while providing mechanisms to compose information across domains. The goal of the Rosetta system-level design language is to compose heterogeneous specifications in a single semantic environment. Esterel is a for mal synchronous language for unambiguously specifying and implementing hardware and software embedded systems. Thus the purpose of is paper is to provide the EDA, semi conductor, and systems-design communities with a well- defined, official IEEE definition of the Esterel language
  • Journal title
    IEEE Design and Test of Computers
  • Serial Year
    2006
  • Journal title
    IEEE Design and Test of Computers
  • Record number

    431691