Design of Architecture for Skeletonization on Hexagonal Sampled Image Grid

This paper describes skeletonization and reconstruction operation of binary image using synchronous processor array based on hexagonally sampled images . A modified architecture using the principle of Hilditch’s algorithm was constructed using synchronous processing elements on hexagonal grid. Based on the architecture for rectangular skeletonization operations, an algorithm for reconstruction is designed, which is a new attempt. The processing elements connected in rectangular array and hexagonal array were investigated. Hexagonal reconstruction gave superior results, in terms of time and performance. For hardware implementations, we have used Modelsim for simulation, Quartus II Software for analysis and synthesis. The performance was tested using Altera Cyclone II FPGA. It was observed that hardware utilization is found to be less for the image sampled on hexagonal grid than on rectangular grid.