A Pseudo-12 bits Successive Approximation ADC for CMOS Image Sensors (Utilisation dʹun ADC SAR pseudo-12 bits dans un capteur dʹimage CMOS)

This paper illustrates the design of an original analogue-to-digital conversion architecture in a CMOS Image Sensor using a pseudo-12 bits Successive Approximation (SA) ADC. The proposed architecture works like a conventional SA-ADC, and presents a special feature: as a CMOS Image Sensor is an application where the noise depends on the signal amplitude, the resolution of the system depends on the value of the signals to be converted. The effective resolution of the converter is 9 bits, but the global resolution is 12 bits. The signal to be converted is compared with a threshold corresponding to 1/8 of the full scale. If the signal is greater than the threshold, the conversion results over 9 bits are used as the nine (9) LSBs of a twelve (12) bits word, the 3 remaining MSBs are set to 000, and thus the achieved resolution of the converter is 12bits. Otherwise if the signal is smaller than the threshold, the conversion results over 9 bits is used as the 9 MSBs of a 12 bits word, the 3 remaining LSBs are obtained randomly, and in this case, thus the resolution of the converter is pseudo-12bits. The converter uses fully differential charge redistribution DAC, a regenerative track and latch comparator and successive approximation registers. The transition between 9 bits and 12 bits is provided by an output stage responsible of adding 3 LSBs or 3 MSBs to the conversion results over 9 bits depending on the comparison value. At the end of the conversion, this SA-ADC gives the equivalent of a ramp starting with code 0 and finishing with code 4095, which represents the 4096 codes of a 12 bit converter. The proposed design presents the benefit of increasing the number of bits of an ADC without excessively increasing its complexity or its processing time. The converter is designed in CMOS 65nm technology, and will be implemented in a 5Megapixel sensor, at a sampling rate of 8.33MS/s. The measurements show good linearity and verify the concept of the new architecture.