Title of article
Digital Background Calibration for Capacitor Nonlinearity in Pipelined Analog to Digital Converter
Author/Authors
Abdollahi، Batool نويسنده Department of Electrical Engineering, Shahid Chamran University of Ahvaz, Ahvaz, Iran , , Farshidi، Ebrahim نويسنده Department of Electrical Engineering, Shahid Chamran University of Ahvaz, Ahvaz, Iran ,
Issue Information
روزنامه با شماره پیاپی 0 سال 2013
Pages
4
From page
229
To page
232
Abstract
This paper presents a digital background calibration algorithm for 1.5bit/stage analog
to digital converter. The error that discussed in this paper is: capacitor nonlineary error due to
MOSCAP of first stage of pielined ADC. Proposed calibration algorithm uses an 16 bit sigma-delta
ADC for calibration and coefificien is updated with LMS algorithm. A 14-bit pipelined ADC is
simulated by Matlab Simulink. After calibration, simulation gives a great improvement in SNDR and
SFDR.
Journal title
Technical Journal of Engineering and Applied Sciences (TJEAS)
Serial Year
2013
Journal title
Technical Journal of Engineering and Applied Sciences (TJEAS)
Record number
789159
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