Signal integrity analysis of interconnects using the FDTD method and a layer peeling technique

This paper presents the application of an impedance layer peeling technique to network parameter extraction from finitedifference time-domain (FDTD) simulations. It is shown that the combination of both methods offers a simple and efficient way to analyze lossless linear 1- or 2-port structures. The extraction of equivalent entirely in the time domain and the optimization of lumped element parameters is not necessary. Special attention is paid to the problem of injecting voltage steps with short risetimes into the FDTD grid. Results obtained with this technique are compared to network analyzer measurements and usual FDTD analysis based on scattering parameter extraction