Abstract :
The effectiveness of buried capacitance technology, used with discrete surface mounted decoupling capacitors, in reducing circuit malfunctions due to the noise voltage between power/ground planes in a multilayer printed circuit board is investigated. The analysis is carried out on a fully populated multilayer board, where an integrated circuit with very large package provides a lot of digital signals with measured rise/fall times equal to 400 ps. The role of the integrated circuitʹs package in damping out the resonance peaks at resonance frequencies on the power plane is highlighted. The relations between the power-bus transfer impedance and noise spectrum are also studied, in order to better evaluate the effects of the buried capacitance technology and decoupling capacitors on the power-bus noise filtering.
