Author/Authors :
K.، Yiannopoulos, نويسنده , , K.، Vyrsokinos, نويسنده , , N.، Pleros, نويسنده , , C.، Bintjas, نويسنده , , G.، Guekos, نويسنده , , H.، Avramopoulos, نويسنده , , K.، Vlachos, نويسنده ,
Abstract :
In this letter, we demonstrate clock extraction from 10-Gb/s asynchronous short data packets. Successful clock acquisition is achieved from data packets arriving at time intervals of only 1.5 ns, irrespective of their precise phase relation. The clock recovery circuit used consists of a Fabry-Perot filter and an ultrafast nonlinear interferometer gate and requires very short time for synchronization.
