Networks on chips — using DQQB (Distributed Queue Quad-Bus) on multi-CPU chips Original Research Article

This paper discusses using a new protocol based on DQDB (Distributed Queue Dual Bus), called DQQB, or Distributed Queue Quad-Bus. The idea is to modify the backplane bus of current architecture by utilizing four busses in the backplane. One bus going in the positive yy direction and one going in the negative yy direction would allow multiple CPUs on the yy-axis to talk to various components by requesting slots and sending data packets (in the reverse direction) reliably. The other two busses are in the positive xx direction for upstream and the negative xx direction for downstream. The system is inherently stochastic as the data packets may incur bit-flips due to various types of interference, but by applying network protocols for reliable data transfer, we can reduce the probability of error. Also, by redesigning the architecture to account for DQQB, we can dramatically increase our system’s throughput.