Title of article :
Compilation for FPGA-based reconfigurable hardware
Author/Authors :
J.M.P.، Cardoso, نويسنده , , H.C.، Neto, نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2003
Abstract :
This paper provides techniques for compiling software programs into reconfigurable hardware which offer faster and more efficient performance than the complex resource-sharing approaches typical of high-level synthesis systems. The Java-based compiler presented in this paper uses intermediate graph representations to embody parallelism at various levels.
Journal title :
IEEE Design and Test of Computers
Journal title :
IEEE Design and Test of Computers