Demonstration of decimation filter and high-speed testing of a component of the filter

We study decimation filters based on the single-flux-quantum circuit in order to realize over-sampled AD converter. We designed the decimation digital filters using CONNECT cells, a well-developed cell library. We designed a T1 cell, because the T1 cell is the key for the counting-type decimation filter. We confirmed correct operation up to 43 GHz by using an on chip test system. Using the T1 cell, we designed second-order counting-type decimation sinc filters with decimation factors N=2 and N=4. The circuit scale was as high as 2758 junctions. We also confirmed the correct operation of these filters.