Theoretical and Experimental Investigation of Si Nanocrystal Memory Device With HfO2 High-k Tunneling Dielectric

In this paper, silicon (Si) nanocrystal memory using chemical vapor deposition (CVD) HfO2 high-k dielectrics to replace the traditional SiO2 tunneling/control dielectrics has been fabricated and characterized for the first time. The advantages of this approach for improved nanocrystal memory operation have also been studied theoretically. Results show that due to its unique band asymmetry in programming and retention mode, the use of high-k dielectric on Si offers lower electron barrier height at dielectric/Si interface and larger physical thickness, resulting in a much higher Jg,programming/Jg,retention ratio than that in SiO2 and therefore faster programming and longer retention. The fabricated device with CVD HfOs shows excellent programming efficiency and data-retention characteristics, thanks to the combination of a lower electron barrier height and a larger physical thickness of HfC)2 as compared with SiO2 of the same electrical oxide thickness (EOT). It also shows clear single-electron charging effect at room temperature and superior data endurance up to 10^6 write/erase cycles.