Abstract :
In order for ULSI manufacturing to minimize the COO (cost of ownership) aspect in the wiring process and realize fabricating over 256M bits DRAM, several wiring technologies have been proposed. The evidential criteria in choosing the most probable one are physical or material limitations (e.g. step-coverage and resistivity) and requirements from manufacturing (e.g. process complexity, reliability, throughput, and total cost). Therefore, a combination of metallurgy using chemical vapor deposition (CVD) with simplified multilevel interconnects has a high potential in overcoming those difficulties. In this paper, an integrated multilevel metallization (IMM) by considering the above criteria is discussed. Alternatives of improved W-CVD, TiN-CVD using diborane (B2H6) and methylhydrazine (MH) reduction, selective W-CVD, and Cu wiring are described from our recent studies.
