Title of article
Limits to binary logic switch scaling - a gedanken model
Author/Authors
III، Cavin, R.K., نويسنده , , V.V، Zhirnov, نويسنده , , J.A، Hutchby, نويسنده , , G.I.، Bourianoff, نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2003
Pages
-1933
From page
1934
To page
0
Abstract
In this paper we consider device scaling and speed limitations on irreversible von Neumann computing that are derived from the requirement of "least energy computation." We consider computational systems whose material realizations utilize electrons and energy barriers to represent and manipulate their binary representations of state.
Keywords
Closely packed devices , device scaling limits , digital integrated circuits , heat removal , Nanotechnology , power consumption , Tunneling
Journal title
Proceedings of the IEEE
Serial Year
2003
Journal title
Proceedings of the IEEE
Record number
99739
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