Effect of patterning on thermal agglomeration of ultrathin silicon-on-insulator layer

Effect of patterning on thermal agglomeration of ultrathin silicon-on-insulator (SOI) layer has been studied. A square-shaped 12 nm thick SOI layer was patterned by lithography and by selective etching with a KOH solution. The structural change by ultrahigh vacuum annealing in a temperature range of 900–1100 °C was observed by atomic force microscopy. The agglomeration takes place preferentially from the pattern edges at a lower annealing temperature than that for the unpatterned layer, indicating enhanced diffusion of Si atoms at the edges. Additionally, the patterning causes formation of smaller islands than those for the unpatterned layer, reflecting that the patterning limits the amount of Si atoms supplied for the island formation.