Effect of surface treatment of Si substrates and annealing condition on high-k rare earth oxide gate dielectrics

Effect of chemical oxide and low temperature long time annealing on the electrical characteristics for rare earth oxides deposited on Si(1 0 0) were investigated. Formation of chemical oxide on Si substrates prior to the Gd2O3 depositions was found to decrease the leakage current significantly compared the films deposited on HF-last Si substrate, when the thickness was 3.5 nm or thicker, while the effect was not observed when the thickness was 2.8 nm. Annealing at 400 °C for 90 min also decreased leakage current of Dy2O3 thin films with little increase of capacitance equivalent thickness (CET).