• DocumentCode
    17996
  • Title

    An Evaluation of Multiple Branch Predictor and Trace Cache Advanced Fetch Unit Designs for Dynamically Scheduled Superscalar Processors

  • Author

    David Koppelman استاد راهنما , Ahmed A. El-Amawy استاد مشاور , J. Ramanujam استاد مشاور

  • University
    Lovisiana State University
  • Grade
    نامعلوم
  • Major
    Master of Science in Electrical Engineering )M.S.E.E.( )Electrical Computer Engineering(
  • Number of pages
    0
  • Publish Date
    2004
  • Keyword

    Computer architecture , dynamically scheduled , superscalar , Processor , fetch unit , fill unit , YAGS , multiple branch predictor , trace , trace cache

  • Note
    01
  • Language
    انگليسي
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=17&DC=17996