Synthesis of FC-OTA and CMOS CFOA Using Super Buffer Technique

A new design technique employing super buffer stage in the simulation of Current Feedback Operational Amplifier (CFOA) is presented. The super buffer stage is connected in the output node of high performance Folded Cascode OTA (FC OTA) that represent the input stage of CMOS CFOA. The performance parameters of CMOS CFOA such as bandwidth, slew rate, settling time are extensively improved compared to traditional buffer stage. These parameters are very important in high frequency applications that use CMOS CFOA as an active building block such as A/D converters, and active filters. Also the DC input offset voltage and harmonic distortion (HD) of very low values compared with the conventional CMOS CFOA are obtained. P-Spice simulation results using 0.5μm MIETEC CMOS process parameters shows considerable improvement over existing CMOS CFOA simulated model using traditional buffers. Some of the performance parameters for example are DC gain of 67.2 dB, open-loop gain bandwidth product of 104 MHz, slew rate (SR+) of +91.3V/μS and DC input offset voltage of -0.2mV