شماره ركورد كنفرانس :
2727
عنوان مقاله :
All Graphene Configurable Logic Block
عنوان به زبان ديگر :
All Graphene Configurable Logic Block
پديدآورندگان :
Seif Kashani Ali نويسنده Kashan University - ECE Department , Karimiyan Alidash Hossein نويسنده Kashan University - ECE Department , Miryala Sandeep نويسنده National Institute of Sub Atomic Physics (Nikhef) - Electronics Technology Department
كليدواژه :
Graphene , CLB , FPGA , Reconfigurable Gate , D-Flip-Flop
عنوان كنفرانس :
اولين كنفرانس بين المللي دستاوردهاي نوين پژوهشي در مهندسي برق و كامپيوتر
چكيده لاتين :
Due to physical limitation of Silicon based CMOS further scaling of MOS device has become a complicated task and research community is investigating on post-Silicon materials and Graphene based devices seems to be a viable candidate for future VLSI industry.
In this paper a Graphene Re-configurable Gate (RG) is used in designing Configurable Logic Block (CLB) which is the basic unit in all FPGA’s. In this paper we also characterize the CLB’s internal elements i.e. Latch and D-Flip-Flop (DFF). Characterization results show that RG based CLB has 58x more speed in comparison with silicon based CLB. This paper also summarizes the timing characterization information of RG based CLB.
شماره مدرك كنفرانس :
4240260
