3632

LTDR Router: Low Latency Traffic Distributed FPGA Based Router Microarchitecture using dedicated paths

Hadishahriar Shahhosseini ,

Network-on-Chip , Router Architecture , Headof-Line (HoL) blocking , Dedicated Paths

ايران

Mahdi Elahi

Network-on-Chip, Router Architecture, Headof-Line (HoL) blocking, Dedicated Paths