A Low Complexity Hardware for Compressive Sensing Matrix Generation

In this paper a low complexity hardware is designed to generate a deterministic matrix for compressive sensing systems. The construction of the matrix is based on the connection between the parity check matrix of LDPC codes and the measurement matrix of compressive sensing. For efficient hardware realization, a geometric approach to the construction of LDPC codes is used for matrix generation on the fly without requiring a lot of storage. The performance of generated matrix is approved under ℓ1-minimization and OMP recovery algorithms, and it performs comparably to the corresponding random matrix. The described hardware has been implemented on a Xilinx Spartan 6 FPGA.