An ultra-low-power TIA plus Limiting Amplifier in 90nm CMOS technology for 2.5 Gb/s optical receiver

In this paper a new shunt-shunt feedback transimpedance amplifier (TIA), followed by a 4 stages limiting amplifier (LA), proves to be suitable as receiver front-end for a 2.5 Gb/s communications over fiber optic is presented. This work is realized in 90nm CMOS technology. Presented TIA is consisted of three cascaded stages of common source amplifiers which utilizes inductive peaking and capacitive degeneration simultaneously to compensate the bandwidth limitation. Limiting amplifier is based on a differential pair with active loads. Similar to TIA, inductive peaking has been implemented to alleviate the effect of parasitic capacitances in LA. To verify the circuit performance, the proposed TIA and LA has been simulated using HSPICE software. The TIA has a 54 dBΩ transimpedance gain and 2.68 GHz bandwidth, the LA has a 57 dB gain and 3.3 GHz bandwidth. The differential voltage swing at the output is 380 mV. The total power consumption is 781.37 μW. The results show superior performance in comparison with other works.