شماره ركورد كنفرانس :
4220
عنوان مقاله :
Design of High performance and Low Power 16T Full Adder Cell for Sub-threshold Technology
پديدآورندگان :
Pakniyat Ebrahim e.pakniyat@imamreza.ac.ir Department of Electronic Engineering, Imam Reza International University , Reza Seyed talebiyan@imamreza.ac.ir Department of Electronic Engineering, Imam Reza International University
كليدواژه :
bit full adder , sub , threshold voltage technology , propagation delay , power consumption.
عنوان كنفرانس :
هجدهمين كنفرانس ملي دانشجويي مهندسي برق ايران
چكيده فارسي :
This paper presents a new structure of 1-bit full adder for sub-threshold technology. It compares full adder sub-circuits and also compares the proposed full adder with common full adders in terms of propagation delay, power consumption, power delay product and square power delay product in sub-threshold technology. HSPICE simulations show that the power dissipation, power delay product and square power delay product of the proposed 16T full adder is 5%, 16% and 20% better than the best common full adder TG, respectively. The full adder circuits are compared in 260 (mV) supply voltage.
