Reducing of Circulating Current in Parallel Interleaved Converters with Modified SVM strategy

In this article, an improved three-level space vector modulation (3L-SVM) is proposed to decrease simultaneously the zero-sequence circulating current (ZSCC) and common-mode voltage (CMV) for a system with two parallel converters and a common-mode inductor (CMI). These objectives are achieved by eliminating zero-sequence vectors (ZSC) in 3L-SVM which leads to a significant improvement in converter output waveform quality. To prove the correctness of eliminating the zero vectors from the switching pattern of two converters, initially theoretical analyses have been presented to achieve the goals stated in the proposed method. The proposed method is simulated and validated through MATLAB software and results are compared with traditional 3L-SVM. As well, it is illustrated that ZSCC, CMV, DMCC, and THD are decreased by the proposed method.