A Low Power 2.5Gb/s CMOS Optoelectronic Amplifier

In this paper, a low power 2.5Gb/s CMOS optoelectronic amplifier is designed using a standard 0.18μm CMOS technolog. Design consists of a transimpedance amplifier (TIA) and 4 stages limiting amplifier (LA). In this design TIA is based on push-pull inverter topology with voltage-current active feedback and LA designed based on basic common-source differential pair topology with inductive peaking technique for bandwidth extension. Simulation were performed using TSMC 0.18μm CMOS technology in HSPICE software. The resuls shows the following performance: the TIA has a 53dB transimpedance gain and 1.8GHz bandwidth, the LA has a 38dB gain and 2GHz bandwidth. The differential voltage swing at the LA output is 640mV and power consumption TIA and LA from a 1.5V power supply are 794μW and 4mW respectively. The results indicate this design is suitable as optoelectronic amplifier for a 2.5Gb/s communications over fiber optic.