Author/Authors
faisal, mohammed ridha isparta uygulamalı bilimler üniversitesi - teknoloji fakültesi, Isparta, Turkey , göksu, tuna isparta uygulamalı bilimler üniversitesi - teknoloji fakültesi, Isparta, Turkey
Title Of Article
OpenCL Implementation of Firewall on FPGA
شماره ركورد
35912
Abstract
This study was conducted to ensure that firewalls used in computer networks can handle increased data traffic without delay and packet loss. For this purpose, a firewall has been developed with parallel architecture on FPGA by using OpenCL language which enables parallel programming. Rule checking for IPv6 packets is done in parallel on FPGA. For packet filtering, the host redirected IP packets to the FPGA. An array of decisions indicating whether there is a match between rules and packets is returned from the FPGA to the host to decide whether to forward or drop IP packets. In this study, we have achieved a processing performance of more than 1 million packets per second for 100 firewall rules with IPv6 packets. The third layer firewall which is developed as a result of this study, is aimed to be a basis for higher level security devices.
From Page
118
NaturalLanguageKeyword
OpenCL , FPGA , Firewall
JournalTitle
Sdu International Technologic Science
To Page
125
JournalTitle
Sdu International Technologic Science
Link To Document