DocumentCode :
1001782
Title :
Making a List...Checking it Twice
Author :
Martin, Grant
Author_Institution :
Tensilica
Volume :
24
Issue :
6
fYear :
2007
Firstpage :
596
Lastpage :
597
Abstract :
This is a review of Low Power Methodology Manual: For System-on-Chip Design (by Michael Keating, David Flynn, Rob Aitken, Alan Gibbons, and Kaijian Shi). This book provides a comprehensive inventory of methods of low-power IC design, along with discussions of the various options available to design groups for implementing both basic and advanced techniques into their SoC designs. It also contains some chapter references and a reasonably sized bibliography that point to some of the significant background and fundamental work underlying these recommendations.
Keywords :
Best practices; Books; Design methodology; Electronic design automation and methodology; Guidelines; Hardware design languages; Process design; Productivity; System-on-a-chip; Yarn; IC design; SoC design; low power; methodology manual;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2007.197
Filename :
4397188
Link To Document :
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