Differential BiCMOS logic circuits: fault characterization and design-for-testability

Author

Hessabi, S. ; Osman, M.Y. ; Elmasry, M.I.

Author_Institution

Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada

Volume

3

Issue

3

fYear

1995

Firstpage

437

Lastpage

445

Abstract

Merged Current Switch Logic (MCSL) and Differential Cascode Voltage Switch Logic (DCVSL) are two common structures for differential BiCMOS logic family, that have several potential applications in high-speed VLSI circuits. This paper studies the fault characterization of these BiCMOS circuits. The impact of each possible single defect on the behavior of the circuits is analyzed by simulation. A new class of faults which is unique to differential circuits is identified and its testability is assessed. We propose a design-for-testability method that facilitates testing of this class of faults. Two different realizations for this method are introduced. The impact of this circuit modification on the behavior of the circuit in normal mode is investigated.<>

Keywords

BiCMOS digital integrated circuits; BiCMOS logic circuits; VLSI; design for testability; fault diagnosis; integrated circuit testing; logic design; logic testing; DCVSL; DFT; MCSL; design-for-testability; differential BiCMOS logic circuits; differential cascode voltage switch logic; fault characterization; high-speed VLSI circuits; merged current switch logic; Analytical models; BiCMOS integrated circuits; Circuit analysis; Circuit faults; Circuit testing; Logic circuits; Switches; Switching circuits; Very large scale integration; Voltage;

fLanguage

English

Journal_Title

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Publisher

ieee

ISSN

1063-8210

Type

jour

DOI

10.1109/92.407001

Filename

407001