Title :
Dynamic latch for high speed GaAs domino circuits
Author :
Nary, K.R. ; Long, S.I.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
Abstract :
A latch for use with GaAs domino logic gates is presented. A hybrid of a GaAs domino logic gate and a two-phase dynamic FET logic gate, the latch stores data during the precharge phase of domino logic operation. It enables the use of domino logic in large scale systems without the need for interfacing with power consumptive static latches. It is implemented with depletion mode MESFETs and dissipates 0.8 mW.
Keywords :
III-V semiconductors; Schottky gate field effect transistors; flip-flops; gallium arsenide; integrated logic circuits; logic gates; 0.8 mW; depletion mode MESFETs; domino circuits; large scale systems; latch; logic gates; precharge phase; two-phase dynamic FET logic gate;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19920022
