DocumentCode
1002838
Title
A 52 GHz Phased-Array Receiver Front-End in 90 nm Digital CMOS
Author
Scheir, Karen ; Bronckers, Stephane ; Borremans, Jonathan ; Wambacq, Piet ; Rolain, Yves
Author_Institution
IMEC, Leuven, Belgium
Volume
43
Issue
12
fYear
2008
Firstpage
2651
Lastpage
2659
Abstract
The commercial potential of the 60 GHz band, in combination with the scaling of CMOS, has resulted in a lot of plain digital CMOS circuits and systems for millimeter-wave application. This work presents a 90 nm digital CMOS two-path 52 GHz phased-array receiver, based on LO phase shifting. The system uses unmatched cascading of RF building blocks and features gain selection. A QVCO with a wide tuning range of 8 GHz is demonstrated. The receiver achieves 30 dB of maximum gain and 7.1 dB of minimum noise figure per path around 52 GHz, for a low area and power consumption of respectively 0.1 mm2 and 65 mW. The presented receiver targets 60 GHz communication where beamforming is required.
Keywords
CMOS digital integrated circuits; millimetre wave integrated circuits; voltage-controlled oscillators; LO phase shifting; QVCO; frequency 52 GHz; frequency 60 GHz; frequency 8 GHz; millimeter-wave application; noise figure 7.1 dB; phased-array receiver front-end; plain digital CMOS circuits; power 65 mW; size 90 nm; Array signal processing; CMOS digital integrated circuits; Circuit optimization; Circuits and systems; Energy consumption; Gain; Millimeter wave circuits; Millimeter wave communication; Noise figure; Radio frequency; 60 GHz; CMOS; QVCO; calibration; mm-wave; phased-array; tuning range; variable gain;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2008.2004861
Filename
4684642
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