DocumentCode
1003315
Title
Analysis on operation of a F-FET memory with an intermediate electrode
Author
Khoa, Tran Dang ; Horita, Susumu
Author_Institution
Japan Adv. Inst. of Sci. & Technol., Ishikawa, Japan
Volume
51
Issue
5
fYear
2004
fDate
5/1/2004 12:00:00 AM
Firstpage
820
Lastpage
823
Abstract
An operation model of a ferroelectric gate field-effect transistor memory with an intermediate electrode was proposed and analyzed. Read endurance characteristics of the memory during a consecutive reading was simulated using this model. The simulation results showed good agreement with the experimental data.
Keywords
electrodes; ferroelectric storage; field effect memory circuits; field effect transistors; integrated circuit modelling; F-FET memory; ferroelectric devices; ferroelectric gate FET memory; ferroelectric memory; field effect transistor; field-effect transistors; intermediate electrode; read endurance; Capacitors; Electrodes; FETs; Ferroelectric films; Ferroelectric materials; Hysteresis; MOSFET circuits; Polarization; Thin film transistors; Threshold voltage; Capacitor; FET; ferroelectric; ferroelectric devices; ferroelectric film; ferroelectric memory; field-effect transistors;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2004.825808
Filename
1303845
Link To Document