Beat the competition: a knowledge-based design process addressing the antenna effect and cell placement

Author

Chen, Peter H.

Author_Institution

Faraday Technol. Corp., Hsinchu, Taiwan

Volume

20

Issue

3

fYear

2004

Firstpage

18

Lastpage

27

Abstract

Working within the application-specific integrated circuit (ASIC) industry, time to market is very important. With very deep submicron (VDSM) processes, issues with timing enclosure, cell placement efficiency, the antenna effect, signal integrity, etc., have impacted our ability to meet market requirements in a timely manner. By focusing on the design process, two of the major issues, the antenna problem and cell placement efficiency, can be addressed. I propose using knowledge-based priority placement (KBPP), which utilizes design knowledge to simplify those two issues.

Keywords

VLSI; antennas; application specific integrated circuits; circuit optimisation; circuit simulation; integrated circuit layout; time to market; antenna effect; application-specific integrated circuit industry; cell placement efficiency; knowledge-based design process; knowledge-based priority placement; signal integrity; time to market; timing enclosure; very deep submicron process; Capacitance; Delay; Etching; Plasma applications; Plasma materials processing; Protection; Semiconductor diodes; Timing; Very large scale integration; Wire;

fLanguage

English

Journal_Title

Circuits and Devices Magazine, IEEE

Publisher

ieee

ISSN

8755-3996

Type

jour

DOI

10.1109/MCD.2004.1304538

Filename

1304538