Title :
Digital transversal filter architecture
Author :
Greenberger, A.J.
Author_Institution :
AT&T Bell Laboratories, Murray Hill, USA
Abstract :
A fast and efficient architecture is described for the realisation of a pipelined, fully parallel digital transversal filter in VLSI. The order of summation is changed such that no explicit multiplication is seen, gated accumulators are used, and the coefficients are circulated. Estimates for the number of transistors needed for a CMOS implementation are given.
Keywords :
CMOS integrated circuits; VLSI; digital filters; CMOS implementation; VLSI; digital transversal filter; filter architectures; gated accumulators; order of summation; pipelined parallel filter;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19850060
