Title :
25 Gbit/s decision circuit, 34 Gbit/s multiplexer, and 40 Gbit/s demultiplexer IC in selective epitaxial Si bipolar technology
Author :
Felder, A. ; Stengl, R. ; Hauenschild, J. ; Rein, H.-M. ; Meister, T.F.
Author_Institution :
Siemens AG, Munich, Germany
fDate :
3/18/1993 12:00:00 AM
Abstract :
A 25 Gbit/s decision circuit, a 34 Gbit/s multiplexer, and a 40 Gbit/s demultiplexer IC have been realised with selective epitaxial silicon bipolar technology using 0.8 mu m lithography. The data rates achieved are the highest values reported for these types of circuit in any IC technology.
Keywords :
bipolar integrated circuits; demultiplexing equipment; digital integrated circuits; flip-flops; integrated circuit technology; multiplexing equipment; 1100 mW; 25 Gbit/s; 260 mW; 34 Gbit/s; 40 Gbit/s; 605 mW; data rates; decision circuit; demultiplexer IC; eye diagrams; high speed digital ICs; lithography; master slave D-flipflop; multiplexer; power consumption; selective epitaxial Si bipolar technology; time division MUX;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19930351
