Title :
MONO/POLY technology for fabricating low-capacitance CMOS integrated circuits
Author :
Ipri, Alfred C. ; Jastrzebski, L.L.
Author_Institution :
David Sarnoff Res. Center, Princeton, NJ, USA
fDate :
8/1/1988 12:00:00 AM
Abstract :
A process for the fabrication of CMOS transistors with oxide-isolated source-drain regions that are coplanar with the device channel region is described. The process uses the epitaxial lateral overgrowth technique to selectively grow single-crystal silicon from seed regions that will become the transistor channel regions. The source-drain regions are polycrystalline silicon and are deposited following the selective growth. n- and p-channel device characteristics are presented
Keywords :
CMOS integrated circuits; integrated circuit technology; CMOS transistors; MONO/POLY technology; epitaxial lateral overgrowth technique; fabrication; low-capacitance CMOS integrated circuits; n-channel device characteristics; oxide-isolated source-drain regions; p-channel device characteristics; polycrystalline Si; seed regions; selective single crystal growth; source-drain regions; transistor channel regions; CMOS integrated circuits; CMOS process; CMOS technology; Capacitance; Fabrication; Integrated circuit technology; MONOS devices; MOSFETs; Silicon; Substrates;
Journal_Title :
Electron Devices, IEEE Transactions on
