Title :
Digital Logic Simulation in a Time-Based, Table-Driven Environment
Author :
Thompson, E.W. ; Szygenda, S.A.
Author_Institution :
The University of Texas
fDate :
3/1/1975 12:00:00 AM
Abstract :
Digital simulation is the process of modeling, by computer programs, the behavior of a digital network. Digital fault simulation is the modeling of a digital network in the presence of a physical defect. The term "fault" is used to refer to some representation of a physical defect. A simple example of this is the case where an input connection to an AND gate is broken. This would be referred to as a stuck-at-1 fault. Hence the phrase fault simulation.
Keywords :
Automatic testing; Computational modeling; Computer networks; Data structures; Digital simulation; Intelligent networks; Logic design; Logic testing; System testing;
DOI :
10.1109/C-M.1975.218900