DocumentCode :
1008975
Title :
Deductive Techniques for Simulating Logic Circuits
Author :
Chang, H.Y. ; Chappell, S.G.
Author_Institution :
Bell Telephone Laboratories
Volume :
8
Issue :
3
fYear :
1975
fDate :
3/1/1975 12:00:00 AM
Firstpage :
52
Lastpage :
59
Abstract :
The use of logic simulation to facilitate the development of computers, telephone switching processors, and other digital systems has almost become an accepted industrial practice. In order to improve the quality of the design, to evaluate design alternatives, and to shorten development intervals, logic simulators have found wide-spread applications in design checkout and verification, derivation and validation of fault-detection and fault-isolation tests, and management of design and manufacturing data. Because of this, the efficiency of logic simulation techniques has also become a vital concern among the simulator developers and the users.
Keywords :
Circuit faults; Circuit simulation; Computational modeling; Computer industry; Computer simulation; Deductive databases; Digital systems; Logic circuits; Logic testing; Manufacturing industries;
fLanguage :
English
Journal_Title :
Computer
Publisher :
ieee
ISSN :
0018-9162
Type :
jour
DOI :
10.1109/C-M.1975.218902
Filename :
1649378
Link To Document :
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