Comments, with reply, on `Future trends in wafer scale integration´ by R.O. Carlson and C.A. Neugebauer

The commenter argues that the authors of the above paper (see ibid., vol.74, no.12, p.1741-1752, 1986) prematurely dismissed memory as a WSI candidate. He raises the valid point that WSI memory is easier to implement than WSI logic. He proposes a wafer virtual memory as particularly suitable for WSI, using a look-up table to keep track of good and bad RAM cell locations, and thus routing the addresses only to the good locations. The authors contend that while it may well be that memory is ideally suited to WSI for the proposed Chesley usage, it does not represent and overwhelming advantage over the equivalent printed wiring board implementation, and they state their reasons for this conclusion