A Low-Power Blocking-Capacitor-Free Charge-Balanced Electrode-Stimulator Chip With Less Than 6 nA DC Error for 1-mA Full-Scale Stimulation

Large dc blocking capacitors are a bottleneck in reducing the size and cost of neural implants. We describe an electrode-stimulator chip that removes the need for large dc blocking capacitors in neural implants by achieving precise charge-balanced stimulation with <6 nA of dc error. For cochlear implant patients, this is well below the industry´s safety limit of 25 nA. Charge balance is achieved by dynamic current balancing to reduce the mismatch between the positive and negative phases of current to 0.4%, followed by a shorting phase of at least 1 ms between current pulses to further reduce the charge error. On +6 and -9 V rails in a 0.7-mum AMI high voltage process, the power consumption of a single channel of this chip is 47 muW when biasing power is shared by 16 channels.