Author :
Brightwell, Ron ; Pedretti, Kevin T. ; Underwood, Keith D. ; Hudson, Trammell
Abstract :
The Seastar, a new ASIC from Cray, is a full system-on-chip design that integrates high-speed serial links, a 3D router, and traditional network interface functionality, including an embedded processor in a single chip. Cray Inc. designed the SeaStar specifically to support Sandia National Laboratories´ ASC Red Storm, a distributed-memory parallel computing platform containing more than 11,000 network end-points. SeaStar presented designers with several challenging goals that were commensurate with a high-performance network for a system of that scale. The primary challenge was to provide a well-balanced, highly scalable, highly reliable network. From the Red Storm perspective, a balanced network is one that maximizes network performance relative to the computational power of the network end-points. A main challenge for SeaStar was to maximize the bytes-to-flops ratio of network bandwidth - that is, to maximize the amount of network bandwidth relative to each nodes floating-point capability
Keywords :
Cray computers; application specific integrated circuits; bandwidth allocation; distributed memory systems; embedded systems; integrated circuit design; integrated circuit interconnections; microprocessor chips; network interfaces; network routing; performance evaluation; system-on-chip; 3D router; ASIC; Cray SeaStar interconnect; Sandia National Laboratories ASC Red Storm; balanced network; bytes-to-flops ratio; distributed-memory parallel computing platform; embedded processor; high-performance network; high-speed serial links; network bandwidth maximization; network interface functionality; network performance; system-on-chip design; Bandwidth; Hardware; Kernel; Microprogramming; Operating systems; Portals; Protocols; Scalability; Storms; Tropical cyclones; Cray SeaStar; inteconnect; system-on-chip;
