Title :
Efficient modular design of m-out-of-2m TSC checkers, for m=2K1, K>2
Author :
Efstathiou, C. ; Halatsis, C.
Author_Institution :
University of Thessaloniki, Digital Systems & Computers Laboratory, Thessaloniki, Greece
Abstract :
A very efficient modular design method for m-out-of-2m TSC checkers, for m=2K-1, is described. The checkers are designed using full-adder modules and TSC two-rail code checker modules only. Comparisons are made of the number of MOS transistors required and the size of the test set. The low transistor count and the modular structure of the design favours its VLSI implementation.
Keywords :
automatic testing; codes; logic design; logic testing; MOS transistors; TSC module checker modules; VLSI implementations; efficient modular design method; full-adder modules; low transistor count; m-out-of-2 m TSC checkers;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19850769
