• DocumentCode
    1012526
  • Title

    A high speed GaAs error-detection circuit for fiber-optic transmission systems

  • Author

    Singh, Harendra Pratap ; Sadler, R.A. ; Naber, John F. ; Johannessen, Bard O.

  • Author_Institution
    ITT Gallium Arsenide Technol. Center, Roanoke, VA, USA
  • Volume
    35
  • Issue
    9
  • fYear
    1988
  • fDate
    9/1/1988 12:00:00 AM
  • Firstpage
    1405
  • Lastpage
    1411
  • Abstract
    A high-speed GaAs IC for detection of line code vibrations is described. This 144-gate error-detection circuit for monitoring a high-bit-rate fiber-optic link has been designed and fabricated using a high-yield titanium tungsten nitride self-aligned gate MESFET process. This process routinely provides a wafer-averaged gate delay (fan-in=fan-out=2) of less than 70 ps with a power dissipation of 0.5 mW/gate. The error-detection circuits were tested on-wafer using high-frequency probe cards at a clock rate of 1.4 GHz, with a yield of 64%. Packaged circuits worked at a clock frequency of over 2.5 GHz and consumed 200-mW power at a fixed power supply voltage of 1.5 V. The circuits operate over a wide variation in power supply voltage and temperature. When operated at a package temperature of 125°C, the circuits show less than a 12% degradation in their maximum clock frequency. The circuit was inserted into a 565-Mb/s system currently using a silicon ECL part, and full functionality was verified with no necessary modifications
  • Keywords
    III-V semiconductors; digital communication systems; error detection; field effect integrated circuits; gallium arsenide; integrated logic circuits; monitoring; optical communication equipment; optical fibres; 1.5 V; 125 degC; 2.5 GHz; 200 mW; 565 Mbit/s; 70 ps; GaAs; III-V semiconductors; TiWN; clock frequency; error-detection circuit; fiber-optic transmission systems; high bit rate optical fibre link; high speed; line code vibrations; monitoring; monolithic IC; package temperature; power dissipation; power supply voltage; self-aligned gate MESFET process; wafer-averaged gate delay; Circuit testing; Clocks; Frequency; Gallium arsenide; High speed integrated circuits; Monitoring; Packaging; Power supplies; Temperature; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.2572
  • Filename
    2572