DocumentCode
1012887
Title
VLSI chipset for 16×16 ATM switch running at 500 Mbit/s per port
Author
Yeung, M.S. ; Wong, P.C.
Author_Institution
Dept. of Inf. Eng., Chinese Univ. of Hong Kong, Shatin, Hong Kong
Volume
31
Issue
20
fYear
1995
fDate
9/28/1995 12:00:00 AM
Firstpage
1719
Lastpage
1720
Abstract
An ATM VLSI chipset based on pipeline banyan running at 500 Mbit/s per port is discussed. With 1 μm CMOS technology, the control plane chip runs at 80 MHz, and the data plane chip is limited only by gate delay
Keywords
CMOS digital integrated circuits; VLSI; asynchronous transfer mode; electronic switching systems; pipeline processing; switching circuits; 1 micron; 500 Mbit/s; 80 MHz; ATM switch; CMOS technology; VLSI chipset; control plane chip; data plane chip; gate delay; pipeline banyan;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19951218
Filename
469261
Link To Document