Title :
An investigation of a molybdenum gate for submicrometer CMOS
Author :
Kwasnick, R.F. ; Kaminsky, E.B. ; Frank, P.A. ; Franz, G.A. ; Saia, R.J. ; Polasko, K.J. ; Gorczya, Thomas B.
Author_Institution :
Gen. Electr. Corp. Res. & Dev. Center, Schenectady, NY, USA
fDate :
9/1/1988 12:00:00 AM
Abstract :
Processing issues including Mo deposition, gate etching, ion implant channeling, and integration of a Mo gate with high-temperature processing are discussed. Methods for addressing these issues are described. A 0.8-μn Mo-gate CMOS process incorporating these methods has been developed. Submicrometer Mo-gate NMOS and PMOS devices and 0.8-μm CMOS ring oscillator results are presented. The high performance of these devices and circuits demonstrates the potential of a Mo gate
Keywords :
CMOS integrated circuits; integrated circuit technology; metallisation; molybdenum; sputter deposition; 0.8 micron; Mo deposition; Mo-Si; Mo-gate CMOS process; PMOS devices; gate etching; high performance; high-temperature processing; ion implant channeling; ring oscillator; submicrometer CMOS; submicron NMOS devices; CMOS process; Circuits; Conductivity; Etching; Implants; MOS devices; Ring oscillators; Sheet materials; Sputtering; Temperature;
Journal_Title :
Electron Devices, IEEE Transactions on
