Surface and geometry effects on large signal base input voltage and input resistance of junction transistors

A design theory for large signal base input voltage and input resistance of junction transistors is presented with emphasis on the effect of surface recombination and transistor geometry. Two-dimensional distributions of minority carrier density and electric field are obtained for the separate portions of the base region. These distributions are then expressed in terms of emitter current and are used to derive expressions for the large signal base input voltage and resistance. The dependence of carrier distribution on surface recombination velocity and transistor geometry is illustrated by curves. The theory is corroborated by a series of experiments carried out with p-n-p power transistors. The parameters varied are surface recombination velocity (by baking), emitter diameter, base ring diameter, dice thickness and base region resistivity. The measured base input voltage and resistance are plotted and compared with calculated values based on the theory presented. Good agreement is found between calculated and measured values. The results deviate in several interesting respects from the values predicted by the small signal or low injection level theory. Based on this theory, design considerations for the large signal input voltage and input resistance are discussed.