Flicker Noise and Its Degradation Characteristics Under Electrical Stress in MOSFETs With Thin Strained-Si/SiGe Dual-Quantum Well

Author

Jiang, Y. ; Loh, W.-Y. ; Chan, D.S.H. ; Xiong, Y.Z. ; Ren, C. ; Lim, Y.F. ; Lo, G.Q. ; Kwong, D.L.

Author_Institution

Inst. of Microelectron., Singapore

Volume

28

Issue

7

fYear

2007

fDate

7/1/2007 12:00:00 AM

Firstpage

603

Lastpage

605

Abstract

This letter reports on the low-frequency flicker-noise characteristics in fresh and electrically stressed pMOSFETs with thin strained-Si (~4 nm)/Si_0.6Ge_0.4 (~4 nm) dual-quantum-well (DQW) channel architectures. Normalized power spectral density (NPSD) of I_d fluctuations (S_ID/I_d ²) in fresh DQW devices exhibits significant improvement (by >10²times) due to buried channel operation at low V_g. At high V_g, the NPSD enhancement reduces as carriers populate in the parasitic surface channel. Upon electrical stress, noise behavior in DQW devices was found to evolve from being carrier number-fluctuation dominated to mobility- fluctuation dominated. This was accompanied by the observation of a "less-distinct" buried-channel operation, indicating a potential stability issue of the Si/SiGe structure.

Keywords

MOSFET; flicker noise; quantum well devices; semiconductor device noise; semiconductor quantum wells; DQW channel architecture; NPSD; Si-SiGe - Interface; buried channel operation; electrically stressed pMOSFET; flicker noise degradation characteristics; normalized power spectral density; thin strained dual-quantum well; 1f noise; Degradation; Germanium silicon alloys; Low-frequency noise; MOSFETs; Microelectronics; Rough surfaces; Silicon germanium; Stress; Surface roughness; Electrical stress; Si/SiGe dual-quantum well (DQW); flicker noise; interface traps;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2007.899763

Filename

4252200