• DocumentCode
    1014614
  • Title

    A Novel Dual-Doping Floating-Gate (DDFG) Flash Memory Featuring Low Power and High Reliability Application

  • Author

    Li, Yan ; Huang, Ru ; Cai, Yimao ; Zhou, Falong ; Shan, Xiaonan ; Zhang, Xing ; Wang, Yangyuan

  • Author_Institution
    Peking Univ., Beijing
  • Volume
    28
  • Issue
    7
  • fYear
    2007
  • fDate
    7/1/2007 12:00:00 AM
  • Firstpage
    622
  • Lastpage
    624
  • Abstract
    In this letter, a novel Flash memory cell structure using dual doping polysilicon (p-n-p) as the floating gate, which can improve the cell performance and reliability, is proposed. Except for an additional large-angle tilted implantation, the fabrication technology is essentially compatible with standard CMOS technology. Measured results show that the new Flash cell with p-n-p-type floating gate can achieve higher programming speed, lower power, comparable erasing performance, and better data retention characteristics in comparison with conventional n-type floating-gate structure.
  • Keywords
    CMOS memory circuits; flash memories; high-speed integrated circuits; integrated circuit manufacture; integrated circuit reliability; integrated memory circuits; low-power electronics; CMOS technology; data retention; dual doping polysilicon; flash memory cell; large-angle tilted implantation; p-n-p-type floating gate; programming speed; CMOS technology; Doping; Electrons; Fabrication; Flash memory; Flash memory cells; Leakage current; Nonvolatile memory; Power measurement; Stress; Flash memory; floating gate; low power; programming speed; retention time; stress-induced leakage current (SILC);
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2007.897888
  • Filename
    4252207